Avago-technologies LSI8751D Bedienungsanleitung PDF herunterladen (Seite 12)

xii Contents

Tables

2.1 External Memory Support 2-7

2.2 Bits Used for Parity Control and Generation 2-13

2.3 SCSI Parity Control 2-14

2.4 SCSI Parity Errors and Interrupts 2-15

2.5 Differential Mode 2-20

3.1 PCI Bus Commands and Encoding Types 3-3

3.2 PCI Conﬁguration Register Map 3-12

4.1 LSI53C875, LSI53C875J, LSI53C875E, and LSI53C875JE

Power and Ground Signals 4-7

4.2 LSI53C875N Power and Ground Signals 4-7

4.3 LSI53C875JB and LSI53C875JBE Power and

Ground Signals 4-8

4.4 System Signals 4-10

4.5 Address and Data Signals 4-11

4.6 Interface Control Signals 4-12

4.7 Arbitration Signals 4-13

4.8 Error Reporting Signals 4-14

4.9 SCSI SIgnals 4-15

4.10 Additional Interface Signals 4-18

4.11 External Memory Interface Signals 4-21

4.12 JTAG Signals (LSI53C875J/LSI53C875N/LSI53C875JB

Only) 4-22

4.13 Subsystem Data Conﬁguration Table for the LSI53C875E

(PCI Rev ID 0x26) 4-23

4.14 Subsystem Data Conﬁguration Table for the LSI53C875

(PCI Rev ID 0x04), Revision G Only 4-23

4.15 External Memory Support 4-24

5.1 LSI53C875 Register Map 5-2

5.2 Examples of Synchronous Transfer Periods for SCSI-1

Transfer Rates 5-16

5.3 Example Transfer Periods for Fast SCSI-2 and Ultra SCSI

Transfer Rates 5-17

5.4 Maximum Synchronous Offset 5-18

5.5 SCSI Synchronous Data FIFO Word Count 5-28

6.1 SCRIPTS Instructions 6-2

6.2 Read/Write Instructions 6-24

1 2 ... 7 8 9 10 11 12 13 14 15 16 17 ... 313 314

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Avago-technologies LSI8751D Bedienungsanleitung Seite 12